1. Technical Field
The present invention relates in general to integrated circuits and in particular to a monitor for process variations. Still more particularly, the present invention relates to a fabrication variation monitor which can monitor transistor parameters and provide a compensation signal to circuits affected by process variations.
2. Description of the Related Art
The primary challenge in designing integrated circuits is to control circuit parameters, such as delay, in view of variations in the semiconductor fabrication process, supply voltage, and temperature. All of the above parameters and variables generally exhibit complex relationships among each other. Attaining homogeneous transistor operating parameters, such as threshold voltage and transconductance, within an integrated circuit is one of the most important, yet most difficult objectives for precision analog circuits. Transistor threshold voltage is also very critical in propagation speed for high speed low voltage digital circuits.
A metallic oxide semiconductor field effect transistor (MOSFET) has two regions in a silicon substrate, namely a source and drain region, which are disposed at a certain distance from each other. A MOS transistor also has an insulated gate electrode which is disposed above the silicon substrate, created by an insulating film such as a metal oxide film. A current flow from the drain to the source of a MOS transistor is controlled by a voltage supplied to the insulated gate electrode.
The voltage at the gate of a transistor which determines the boundary between the OFF state and the ON state in the drain current, is called the threshold voltage (V.sub.TH). The threshold voltage of a MOS transistor is sensitive to fabrication parameters. The threshold voltage varies according to the thickness and nature of the insulating film utilized at the gate.
The length and width of the source, drain and gate regions determine many of the operating parameters of a MOS transistor. Currently, MOS transistors have dimensions which measure less than a micron. During the fabrication of a MOS transistor, doped layers are deposited or etched on the substrate where the source and drain exist. Etching and implanting are performed utilizing a "mask" which dictates the location at which the deposition or removal of material takes place on a silicon wafer.
During the implanting process, diffraction may occur around the edge of the aperture in the mask. Diffraction causes undercutting of the mask. In the implanting of a gate, undercutting will increase the desired dimension of the gate and decrease the adjacent region. Random fluctuations of the gate dimensions commonly occur in different geographic regions of semi-conductor chips. Underexposure can lead to smaller than desired lengths. Ion implanting and ion "drive-in" are the principle cause of smaller than expected gate lengths. At the edge of the wafer, process tolerances are more difficult to control than at the center. Also, heating in the fabrication process causes migration of atoms at the boundary of the implantation or etch into adjacent regions. Heating also alters the desired dimensions. Further, in the etching process, acid can spread under a mask aperture edge and remove material. It is well known in the art that many fabrication process steps can change the desired dimensions of semiconductor regions. Hence, the desired length (L) and width (W) of the source, drain, and gate can be described as the actual or effective length (L.sub.eff) and the effective width (W.sub.eff). It is important to note that depending on whether the mask is a negative for etching or a positive for deposition, L.sub.eff can be increased or decreased. Underexposure can increase and decrease L.sub.eff. Likewise, overexposure can increase and decrease L.sub.eff
Other process variation leading to diverse MOSFET parameters are doping concentration and mobility. Semiconductor process variations particularly L.sub.eff and W.sub.eff greatly effect the threshold voltages of MOS transistors. In many circuits, a slight shift or deviation in critical threshold voltages produces unacceptable signal processing results.
Techniques for stabilization of transistor threshold voltages have received a substantial amount of attention in the area of precision circuits. Examples of precision circuits, or circuits which are very sensitive to process variations include voltage controlled oscillators and off-chip drivers.
Known compensation techniques for circuits requiring accurate threshold voltages are extensive and diverse. Threshold voltage compensation techniques are typically external. It is very common in the prior art to compensate for threshold voltage variations utilizing indirect methods. Indirect methods do not specifically sense the threshold voltage, or utilize detection of the source of the problem, but compensate by sensing the adverse effects which the threshold voltage variation has created. Generally, each threshold voltage compensation technique implemented is driven by the application of the circuit.
Process variations can also cause propagation aberrations in high speed low voltage digital circuits, particularly in off-chip drivers. Process variations can cause propagation times which range from one half to one and one half of the design target value. Signals arriving too early and signals arriving too late can cause execution difficulties. Timing issues due to process variations are prevalent in on-chip as well as chip-to-chip designs. To control the propagation of high speed low voltage digital circuits, it is necessary to reduce the sensitivity of the circuits to process variations. Propagation compensation circuits have only a limited ability to increased propagation speed.
Similarly, timing problems associated with process variations and threshold voltage are encountered in analog circuits. Control circuits, such as oscillator circuits are particularly sensitive to process variations. A common technique employed in most analog systems today is to take advantage of good matching between two identical transistors. The two transistors are placed proximate to each other on a substrate and identically biased. This method is very common in current mirrors. However, when operating parameters for a large number of transistors are critical, it becomes impossible to take advantage of matching by proximity.
Current calibration techniques are presently used to compensate control circuits. Some current calibration techniques require bias transistors which are calibrated against a fixed reference then utilized to bias an analog cell. The disadvantage of such schemes is that frequent calibration is necessary. Most current calibration designs can not be calibrated during operation and require "off-line" calibration. Techniques to solve the latter problem have been developed by utilizing additional calibration cells. However, the need to switch the bias currents and supply control signals to multiple circuits adds complexity and requires chip area. Current calibration techniques can effectively compensate for threshold voltage, but this technique is unduly complex.
Other known compensation systems use a digital memory and a digital to analog converter to generate reference current for compensation. The reference currents are utilized to stabilize threshold voltages. Cross coupling techniques are also popular for minimizing the input offsets due to threshold voltage variations in analog circuits such as high gain operational amplifiers. Compensation circuits may also utilize comparators to improve matching of threshold voltages.
Tighter process tolerances can be adopted to improve performance or reduce variability, but this substantially increases the cost of the product. Another commonly used technique is extensive testing and selection to isolate acceptable devices. This also increases the cost of the product due to additional testing effort and the corresponding lower yield. A typical threshold voltage compensation circuit compensates for variations utilizing resistive elements and comparators. Known compensation circuits are either based upon devices which are correlated and unable to respond to absolute process variations or they are based upon external references or phenomena. Known compensation circuits adjust for threshold voltage variations by compensating circuit response. Hence, present threshold voltage compensation techniques are deficient because they do not monitor actual device parameters.
To compensate for process induced device variations, complex arrangements have hitherto been required. Hence, a need exists for a simple effective and efficient process variation detector or monitor to compensate for fabrication variations.